STM32F4 以太网异常中断 如何处理

所属分类:STM32F系列 浏览数:142 提问者:guoxiaoduo 提问时间:2018-06-12

问:

如何处理 STM32F4 以太网的异常中断 即 寄存器 ETH_DMASR 中。描述如下 Bit 15 AIS: Abnormal interrupt summary The abnormal interrupt summary bit value is the logical OR of the following when the corresponding interrupt bits are enabled in the ETH_DMAIER register: – ETH_DMASR [1]:Transmit process stopped – ETH_DMASR [3]:Transmit jabber timeout – ETH_DMASR [4]: Receive FIFO overflow – ETH_DMASR [5]: Transmit underflow – ETH_DMASR [7]: Receive buffer unavailable – ETH_DMASR [8]: Receive process stopped – ETH_DMASR [9]: Receive watchdog timeout – ETH_DMASR [10]: Early transmit interrupt – ETH_DMASR [13]: Fatal bus error Only unmasked bits affect the abnormal interrupt summary bit. This is a sticky bit and it must be cleared each time a corresponding bit that causes AIS to be set is cleared.


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